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联系电话:0755-8223-5799   电子邮箱: Talents@aurasemi.com.cn


Analog Power Design Engineer

Dept: Power BU 

Job Description 

Development of designs for high performance, high current buck, boost, buck-boost regulator. 

Circuit design, architecture definition and optimization. 

Close cooperation with program execution, system engineering, application engineering, test, validation and marketing to guarantee flawless execution on product development schedules.

Basic Qualifications 

2~7years professional work experience in analog DC/DC power IC development. 

Knowledge in at least one of analog product experience, such as Buck, Boost and Buck-Boost DC-DC converters; 

Well experience at modeling of switching regulator and loop compensation. 

High power, high current design project experiences is plus. 

Extensive background and knowledge of semiconductor physics and process, especially HV PBCD process 

Good English and Chinese Mandarin



Power Application Engineer(SH/SZ)

Responsibility: 

Validation work of DC-DC product and generate test evaluation report. 

Create application note, white paper and datasheet for the products. 

Co-work with product engineers and IC designers to finish new product design.

Provide the competitive analysis of the DCDC products, identify strengths and weaknesses, evaluate the market needs vs product offering deficiencies, contribute in the new product definition by weighting the value of the specific features and parameters to the customers. 

Interface to the customer, providing technical guidance and support such as product recommendations, schematic review, PCB layout and validation reports, on-site troubleshooting. 

Intensive involvement in local design-in activities with DC-DC and LDO customers including providing system design proposal, preparing customized demo, on-site technical support, customer failure analysis support, etc. 

Requirement: 

BSEE at least 5 years or MSEE 2 year of related experience in DC-DC power such as VRM, buck, boost, buck-boost and LDO application. 

Solid/outstanding Knowledge of VRM,buck, boost, buck-boost and LDO architectures. 

Debug from the system level down to the component level. 

Familiarity with PCB schematic entry and layout. 

Demonstrated strong analytical and problem-solving skills. 

Familiar with operation of all lab related equipment, such as Oscilloscope etc. 

Familiar with office software, such as Word,Excel,Powerpoint, Visio. 

Excellent verbal and written communication skills both in English and Chinese. 

Ability to work in teams and collaborate effectively with people in different functions.

VRM bench test experiences are plus. 

SIMPLIS, MATHCAD etc is a plus. 

Bench automation test experiences (such as LabView, Python) is plus.



Power Test Engineer

This role will develop test strategies for Power (LDO, DC-DC, VRM) ICs, including implementation of characterization, qualification and production test solutions. Role will also be involved in yield improvement and costs reduction while maintaining excellent product quality.

Major responsibilities Include:

• Write test plan based on datasheet.

• Discuss DFT with designer to achieve test coverage and low cost on ATE.

• Test board design with EDA tools.

• Test program offline code and online debug

• Characterization and qualification support for the IC.

• Release test program to subcon during ramp up

• Analysis of part failures leading to test improvement

• Perform yield analysis and contribute to test process improvements.

• Available for business travel upon request.

• Subcon production maintain.

• Good English communication

Qualifications:

• BS EE or equivalent, has basic analog circuit knowledge.

• More than 5 years work experience.

• C++ coding skills, Python is a plus.

• ATE test experience – AccoTest (STS8200/8300), Eagle (ETS88, ETS364) preferred.

• Experience with Altium Designer or Cadence related EDA tools.

• Familiar with I2C/SPI/PMBUS/SVID/SVI2/SVI3 protocol is a plus.

• Self-learning ability.



模拟集成电路设计工程师 Analog IC Design Engineer

职位描述:

工作职责:

1、负责模拟电路模块的规格制定和可行性分析,以及具体电路设计和仿真分析;

2、负责数模混合电路模块版图设计、版图物理验证(DRC,LVS,xRC)及后仿真等;

3、负责(或协助测试工程师)制定测试方案和完成测试。

任职要求:

1、微电子或相关电子信息科学专业本科以上学历;

1、3~5年IC设计公司集成电路工作经验,有至少一次参与流片的经验;

2、掌握一定的模拟电子技术基础,熟悉Bandgap、OP、OSC、POR等基本电路,熟悉反馈和补偿的原理,熟悉PLL的基本电路架构; 熟悉高速电路设计,如高速分频器,输入输出电路等。有某一方面有深入理解者优先;

3、熟悉模拟电路设计流程并能熟练使用主流模拟、Mixed-signal等EDA仿真验证工具,如Cadence Virtuoso、Calibre及数字电路前端设计EDA工具等;

4、有扎实的电路理论和IC设计理论知识,熟悉CMOS工艺;

5、有良好的英语读写能力;责任心强,具备良好的沟通能力和团队合作意识。



资深数字工程师

职责:

与模拟、数字设计团队一起工作开发新产品

负责RTL设计、仿真,为模拟模块建立Verilog模型,ASIC综合,静态时序分析,为ATE生成测试向量

支持测试和产品团队的芯片调试, 失效分析,特性分析和产品发布

要求:

电子工程或相关专业硕士以上学历;

至少3年的数字IC设计经验

在以下至少一项领域的经验

-锁相环设计

-嵌入式SRAM/OTP控制器

-嵌入式MCU,ARM子系统,SOC

-数字信号处理,数据转换器和抽取/插值滤波器

-工具流程,STA,DFT,P&R

熟悉混合信号设计和后端为佳

自我激励和积极主动

良好的沟通能力和较强的团队合作精神



数字集成电路设计工程师

岗位职责: 

负责数字集成电路设计工作。

任职资格: 

1. 微电子、集成电路相关专业,硕士研究生或以上学历;

2. 具备扎实的电路基础知识,了解前端/后端设计流程;

3. 掌握Verilog编程语言,会使用Cadence等设计工具,熟悉Linux/Unix操作系统;

4. 了解数字集成电路的设计和验证工具。



版图设计工程师

岗位职责: 

负责芯片产品版图模块级设计和验证。

任职资格: 

1. 微电子、集成电路或电子类相关专业,专科或以上学历;

2. 具备电子电路基础知识;

3. 具有良好的团队精神和较强的吃苦耐劳精神,易于沟通,为人诚信、踏实。



Analog/Mixed-Signal IC 设计经理

Job Title: Analog/Mixed-Signal IC Design Lead/Manager

Location: Shanghai

Job Type: Full time

奥拉半导体公司诚聘ASIC/Mixed-Signal 设计经理,公司将提供有竞争力的薪酬福利待遇与良好的职业发展机会,欢迎有志于与公司共同成长的专业人士加入我们!


Job Description

Lead and supervise analog/mixed-signal design and digital design for various pressure, motion inertial and other sensor products.

Define and optimize sensor ASIC architectures. Design, implement and verify analog/mixed-signal IC designs for various sensor products. 

Provide technical guidance to ASIC design, layout, application, and validation engineers.

Supervise designs and tape-out on-schedule according to product specifications.

Evaluate and characterize designs in the lab and identify any deviations from requirements and implement corrective actions.

Create thorough review documentation and follow established design flow.

Support production team to develop test plan and failure analysis for final Products

Supervise ASIC testing development 

Requirements & Education:

Master or PhD degree in Electrical Engineering with over 5-10 years experience

Familiar with sensor ASIC circuits especially inertial sensors (gyro and accel)  

Thorough understanding of analog and mixed signal systems trade-offs.

Strong skills in designing various analog/mixed-signal blocks including:

opamp, bandgap references, regulators, high voltage charge pumps,oscillator circuits, PLL, etc.

Extensive experience designing high performance and ultra-low power ADCs and DACs

Advanced knowledge of various ADC architectures, including SAR ADC,Sigma-Delta ADC

Experience in system level design, signal processing tools such as Matlab

Familiar with design/simulation/verification tools including Cadence, Spice, Mentor Graphics, etc.

Lab and test equipment skills for debug, characterization, and validation of designs.

Effective and clear written and oral communication skills.



ASIC/SOC Digital Design Engineer

Job Title: ASIC/SOC数字工程师

Location: Shanghai, China

Job Type: Full time

Aura Semiconductor company is looking for an ASIC digital design at junior or senior levels.


Job Description

Participate in ASIC design flow including system modeling, RTL coding, design verification, Lint/CDC checking, synthesis, formal verification and timing/power analysis

Create SOC architectures (microprocessors, interfaces, bus, memory, boot etc.) and SOC emulation

Perform SOC HW/SW Co-Verification - Developing SOC test benches, APIs, SW driven verification

Set up proper methodologies for chip level timing closure of Analog-Mixed-Signal designs.

Perform chip bring up and performance measurement for IC and systems in laboratory to characterize and debug building blocks

Generate ECO fixes and driving ECO loops.

Develop and maintain design methodologies and flows

Qualification

Bachelor’s or master’s degree in Electrical Engineering, Computer Science or related fields.

Familiar with RTL to GDS digital flow and emphasize on either/both frontend RTL coding, synthesis, linting, formality and STA, or/and mid/backend such as physical Implementation with constraints development and timing closure

Experience in sensor ASIC circuits especially inertial sensors is a plus

Knowledge in Arm core integration, IP selection, HW/SW co-simulation, emulation and application

Experience in digital interface such as I2C/SPI and hands-on experience in debugging the interface in board level is preferred

Experience in FIFO, digital filter such as IIR/FIR

Experience of scripting languages such as Tcl/Perl/Python/bash

Experience in FPGA from RTL to bit-stream and board debugging

Experience/Knowledge of DFT and ATPG will be a plus



MEMS Design Engineer

Job Title: MEMS Design Engineer

Location: Shanghai

Job Type: Full time

奥拉半导体公司诚聘MEMS设计工程师,公司将提供有竞争力的薪酬福利待遇与良好的职业发展机会,欢迎有志于与公司共同成长的专业人士加入我们!

In this role you will be responsible for designing one of the sensors: pressure sensors, MEMS resonators, RF filters, accelerometers, and gyroscopes. You will collaborate closely with CMOS designers, lead the MEMS design, device characterization and testing, and bring the sensors from concept to mass production.


Requirements:

Expert in Finite Element Analysis (FEA). ANSYS is preferred.

Competent in one of the MEMS design areas: piezo-resistive, piezoelectric, electrostatic, or capacitive sensing. 

Familiar with the design mechanism of MEMS sensors such as stress analysis, vibration      theory etc. 

Familiar with MEMS fabrication processes.

Team player to work well with others in a collaborative fast-paced environment

Responsibilities:

Mechanical design of MEMS devices. Drive new product development.

Characterize sensor electrical and mechanical characteristics. 

Troubleshoot prototype iterations. Hands-on work on testing and failure analysis.

Validate simulations with characterization and testing tools. Correlate testing and simulation results to improve model accuracy.

Perform sensitivity analysis to identify and model key design parameters 

Design DOE experiments to understand device physics, materials and fabrication

Mask layout

Interface with local and overseas vendors

Document and report design work and other tasks.

Education:

Master’s Degree or PhD in MEMS, mechanical or electrical engineering.